1. Field of the Invention
The present invention relates to a switch for switching an output voltage, more specifically, a switch, for use in a flash memory, using a triple-well MOS transistor for switching a negative output voltage.
2. Description of the Prior Art
Various microprocessor systems that are able to handle data and arrange information have become an important foundation of information development in the highly developed modern information society. A memory used to store digital data and to provide stored data for microprocessor systems is one of the most important structures in each kind of microprocessor system. A flash memory or an EEPROM (electrically erasable programmable read only memory), due to electron operation, is able to store data in a non-volatile way and to read the stored data quickly and efficiently, unlike optical or magnetic storage media (such as a disc or an optical disc) cooperating with machines so as to access data. Therefore, the flash memory with light volume and convenient and efficient operation has been utilized widely in various microprocessor systems, such as application chip systems, mobile phones, personal digital assistants, personal computers, digital cameras, etc.
A flash memory consists of MOS transistors with a floating gate, each serving as a memory cell for recording a bit data. Please refer to FIG. 1, which shows a schematic diagram of a typical memory transistor Tm. The memory transistor Tm, in addition to a body B, a drain D, a source Sc, and a control gate G as well as a typical MOS transistor, has a floating gate FG. The floating gate FG is located in an oxide layer, insulating from the body B, the drain D, the source Sc, and the control gate G. While storing data, the gate G, the source Sc, the drain D, and the body B are required to be applied proper bias voltages so that the electrons can pass through the oxide layer and thus flow into the floating gate FG. A different amount of charge injected into the floating gate FG of the transistor Tm corresponds to different data. For instance, if more charge is injected into the floating gate FG, the transistor Tm stores a bit data xe2x80x9c1xe2x80x9d; on the contrary, if less charge is injected into the floating gate FG, the transistor Tm stores a bit data xe2x80x9c0xe2x80x9d. The amount of the charge injected into the floating gate will influence the threshold voltage of the transistor Tm. The more negative charge injected into the floating gate of the transistor Tm is, the smaller absolute value of the threshold voltage of the transistor Tm is. Under the circumstance of keeping the control voltage applied on the control gate G, the more negative charge within the floating gate FG is, the higher the conduct performance associated with the transistor Tm is, so that the current between the source and drain of the transistor Tm is greater. In other words, under the circumstance of keeping the control voltage applied on the control gate G, the bit data stored in the transistor Tm depends on the amount of conduct current in the transistor Tm between its source and drain. While overwriting or erasing the original data stored in the memory transistor Tm, the control gate G, the body B, the drain D, and the source Sc are still required to have proper bias voltages applied, causing the electrons within the floating gate FG to pass through the oxide layer and flow into other electrodes of the transistor Tm.
From the previous description, causing charge to pass through the oxide layer (i.e. tunnel effect) is an indispensable step during the operation of the flash memory. However, only very high or very low voltages applied onto the control gate G would induce tunnel-effect. While reading data or other operations, the bias voltage applied onto the control gate G has to be switched to normal voltage. For example, within a flash memory biased with DC 3V, the control gate G probably requires a bias voltage of 9V (in conjunction with 8V applied at the body B) so that the charge passes through the oxide layer for data-erasing. While reading or other operations, the bias of the control gate G has to switch to 0V. Under this circumstance, a special switch is necessary for providing different bias voltages corresponding to different operations, and for meeting special bias requirements with respect to the memory transistor. For instance, the switch is in need of providing 0V or 9V to the control gate of the transistor. Each circuit is usually biased between a positive voltage and ground voltage, i.e. 0V. However, a negative voltage lower than 0V is generated by a specific charge pump, and a specific circuit design is required for switching and transferring the negative voltage to each memory transistor.
It is therefore a primary objective of the claimed invention to provide a switch for switching various voltages and related application. More specifically, a switch capable of providing 0V ground voltage and negative voltage so as to meet various required voltages under various operations.
In the preferred embodiment of claimed invention, a switch is formed within a chip biased between a positive voltage and ground voltage with 0V, and for use in switching an output voltage with 0V or a lower-than-0V negative voltage according to an inputted voltage at a control end. The switch consists of two p-type MOS transistors for transferring positive voltages, and four triple-well MOS transistors for transferring negative voltages, forming a level-offset circuit for offsetting the input voltage in the range of a positive voltage and 0V into that of a positive voltage and a negative voltage. In this way, other four triple-well n-type MOS transistors that are respectively used to transfer ground voltage and negative voltage can correctly be turned on or turned off by the offset voltage which is in the range of a positive voltage and a negative voltage, and can selectively output a ground voltage and a negative voltage at the two output ends.
These and other objectives of the claimed invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the invention, which is illustrated in the various figures and drawings.